The present application relates to a voltage generating circuit, and particularly relates to a voltage generating circuit for generating an analog data signal for a polar transmitter.
A Wireless communications system generally uses radio frequency (RF) signals to transmit data from a transmitter to one or more receivers. Wireless communication systems are frequently used to implement wireless local area networks (LANs) in which data is transmitted and received between computers, servers, Ethernet switches, hubs, and the like. A wireless LAN may, for example, enable web page data to be transferred between a server and a computer.
Wireless communication systems often transmit data through transmitters via polar transmission architectures. Polar transmission architectures may reduce the size and power consumption of a transmitter via removing one or more up-mixing stages from the transmitter. Polar transmitters are typically configured to transmit data based upon at least one amplitude data signal and at least one phase data signal.
FIG. 1 is a block diagram illustrating a conventional polar transmitter 100. As illustrated in FIG. 1, the polar transmitter 100 comprises a phase data generating module 101, and an amplitude data generating module 103. The phase data generating module 101 generates at least one phase data signal PDS based on an initial signal IS according to a phase control signal PCS. The amplitude data generating module 103 generates the amplitude data signal ADS. Furthermore, the phase data signal PDS and the amplitude data signal ADS are modulated to generate a modulated signal MS. Accordingly, a modulating circuit can be comprised in FIG. 1 (not illustrated here) to modulate the phase data signal PDS and the amplitude data signal ADS. The order for the phase data generating module and the amplitude data generating module can be switched. Alternatively, the two actions for the two modules can be down by a single module with two control terminals.
FIG. 2 is a circuit diagram illustrating the amplitude data signal generating module 103 in FIG. 1. As shown in FIG. 2, the amplitude data signal generating module 103 comprises: a digital to analog converter 201, an amplifier 203 (i.e. an OP), an output current generating circuit (in this example, a PMOSFET) 205, a voltage dividing circuit 207, and an amplitude data signal generating circuit 209. The digital to analog converter 201 converts a digital input signal DI, which is related with a desired analog data signal ADS, to an analog input signal AI. The amplifier 203 compares the analog input signal AI with a feedback voltage Vd, which is generated via frequency-dividing the output voltage Vo by the voltage dividing circuit 207, to generate an output voltage controlling signal SVo. The output current generating circuit 205 (in this example, a PMOSFET) generates an output current Io to the output terminal OT, such that the output voltage Vo is generated based on the loading of the amplitude data signal generating circuit 209 and the voltage dividing circuit 207. The amplitude data signal generating circuit 209 generates the analog data signal ADS according to the output voltage Vo. Via above-mentioned operations, a desired analog data signal is generated.
However, the current from the digital to analog converter 201 cannot flow to the amplitude data signal generating circuit 209, thus the current is not applied to generate the analog data signal ADS. Furthermore, the voltage dividing circuit 207 also consumes currents. Additionally, the AM data from DAC presents at OP input, the OP then has to accommodate wide-range input signal since that AM data may operate a rail-to-rail AM data signal. Therefore, the power consumption for such circuit is high.